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 Product Specification
PE4246
Product Description
The PE4246 RF Switch is designed to cover a broad range of applications from DC to 5000 MHz. It is non-reflective at both RF1 and RF2 ports. This SPST switch integrates a single-pin CMOS control interface, and provides low insertion loss while operating with extremely low bias from a single +3-volt supply. In a typical application, the high isolation PE4246 can replace multiple RF switches of lesser isolation performance. It is offered in a small 3x3 mm DFN package. The PE4246 is manufactured on Peregrine's UltraCMOSTM process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Diagram Absorptive SPST UltraCMOSTM RF Switch: DC - 5000 MHz Features * Non-reflective 50-ohm RF switch * 50-ohm (0.25 watt) terminations * High isolation: 55 dB at 1000 MHz, 48 dB at 3000 MHz * Low insertion loss: 0.8 dB at 1000 MHz, 0.9 dB at 3000 MHz * High linearity: +33 dBm input 1dB compression point * CMOS/TTL single-pin control * Single +3-volt supply operation * Extremely low bias: 33 A @ 3 V * Available in a 6-lead DFN package Figure 2. Package Type
RF1 RF2
6-lead DFN
50
CMOS Control Driver
50
CTRL
Table 1. Electrical Specifications @ +25 C, VDD = 3 V (ZS = ZL = 50 )
Parameter
Operation Frequency Operating Power
1
Condition
Minimum
DC
Typical
Maximum
5000 30/24
Units
MHz dBm dB dB dB dB dB dB dB dB dB dBm dBm
CTRL=1/CTRL=0 DC-2000 MHz 2000-3000 MHz 3000-4000 MHz 4000-5000 MHz DC-2000 MHz 2000-3000 MHz 3000-4000 MHz 4000-5000 MHz DC-5000 MHz DC-5000 MHz DC-5000 MHz 49 45 43 40 11 30 50 0.8 0.9 1.0 1.3 55 48 46 44 20 33
Insertion Loss
1.0 1.1 1.3 1.8
Isolation Return Loss Input 1 dB Compression3 Input IP3 Video Feedthrough2 Switching Time
15 2
mVpp s
Notes: 1. Device linearity will begin to degrade below 1 MHz. 2. The DC transient at the output of the switch when the control voltage is switched from Low to High or High to Low in a 50 test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth. 3. Note Absolute Maximum ratings in Table 3. Document No. 70-0090-05 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 8
PE4246
Product Specification
Figure 3. Pin Configuration
VDD GND RF1 1 2 3
Exposed Solder Pad
(bottom side)
Device Description
RF2 GND
6 5 4
CTRL
The PE4246 high-isolation SPST RF Switch is designed to support a variety of applications where high isolation performance is demanded and a non-reflective input and output is desired. This switch is able to replace multiple lesser performing switches in a very small 3x3 mm DFN footprint.
Table 4. DC Electrical Specifications
Parameter Min
2.7
Typ
3.0 33
Max
3.3 40 5 0.3xVDD
Unit
V A V V
Table 2. Pin Descriptions
Pin No.
1 2 3 4 5 6
VDD Power Supply
Pin Name
VDD GND RF1 CTRL GND RF2
Description
Nominal 3 V supply connection.1 Ground connection. 3 RF port. 2 CMOS or TTL logic level: High = RF1 to RF2 signal path Low = RF1 isolated from RF2 Ground connection. RF port. 2
3
IDD Power Supply Current (VDD = 3 V, VCNTL = 3 V) Control Voltage High Control Voltage Low 0.7xVDD 0
Table 5. Control Logic Truth Table
Control Voltage
CTRL = CMOS or TTL High CTRL = CMOS or TTL Low
Signal Path
RF1 to RF2 RF1 isolated from RF2
Notes: 1. A bypass capacitor should be placed as close as possible to the pin. 2. Both RF pins must be DC blocked by an external capacitor or held at 0 VDC. 3. The exposed pad must be soldered to the ground plane for proper switch performance.
Control Logic The control logic input pin (CTRL) is typically driven by a 3-volt CMOS logic level signal, and has a threshold of 50% of VDD. For flexibility to support systems that have 5-volt control logic drivers, the control logic input has been designed to handle a 5-volt logic HIGH signal. (A minimal current will be sourced out of the VDD pin when the control logic input voltage level exceeds VDD.) Electrostatic Discharge (ESD) Precautions When handling this UltraCMOSTM device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 3. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up.
Table 3. Absolute Maximum Ratings
Symbol
VDD VI TST TOP PIN VESD
Parameter/Condition
Power supply voltage Voltage on CTRL input Storage temperature Operating temperature Input power (50 ), CTRL=1/CTRL=0 ESD voltage (Human Body Model)
Min
-0.3 -0.3 -65 -40
Max
4.0 5.5 150 85 33/24 200
Unit
V V C C dBm V
Absolute Maximum Ratings are those values listed in the above table. Exceeding these values may cause permanent device damage. Functional operation should be restricted to the limits in the DC Electrical Specifications table. Exposure to absolute maximum ratings for extended periods may affect device reliability.
(c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 8
Document No. 70-0090-05 UltraCMOSTM RFIC Solutions
PE4246
Product Specification
Typical Performance Data @ 25 C (Unless Otherwise Noted)
Figure 4. Insertion Loss T = -40 C to 85 C
Figure 5. Input 1dB Compression Point and IIP3
0 -40 C -0.5
60
60
50
Insertion Loss (dB) -1 85 C 25 C
IIP3
50
1dB Compression Point (dBm)
-1.5
IIP3 (dBm)
40
40
-2
30
-2.5
Input 1dB Compression
30
-3 0 1000 2000 3000 4000 5000
20 0 1000 2000 3000 4000
20 5000
Frequency (MHz)
Frequency (MHz)
Figure 6. Isolation
0
-20
Isolation (dB)
-40
-60
-80
-100 0 1000 2000 3000 4000 5000
Frequency (MHz)
Document No. 70-0090-05 www.psemi.com
(c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 8
PE4246
Product Specification
Typical Performance Data @ +25 C
Figure 7. RF1 Return Loss (CTRL = High)
Figure 8. RF2 Return Loss (CTRL = High)
0
0
-5
-5
-10 Return Loss (dB) 0 1000 2000 3000 4000 5000 Return Loss (dB)
-10
-15
-15
-20
-20
-25
-25
-30
-30 0 1000 2000 3000 4000 5000
Frequency (MHz)
Frequency (MHz)
Figure 9. RF1 Return Loss (CTRL = Low)
Figure 10. RF2 Return Loss (CTRL = Low)
0
0
-5
-5
-10 Return Loss (dB) Return Loss (dB) 0 1000 2000 3000 4000 5000
-10
-15
-15
-20
-20
-25
-25
-30
-30
-35
-35 0 1000 2000 3000 4000 5000
Frequency (MHz)
Frequency (MHz)
(c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 8
Document No. 70-0090-05 UltraCMOSTM RFIC Solutions
PE4246
Product Specification
Evaluation Kit
The SPST Switch Evaluation Kit board was designed to ease customer evaluation of the PE4246 SPST switch. The RF1 port is connected through a 50 transmission line to the top left SMA connector, J1. The RF2 port is connected through a 50 transmission line to the top right SMA connector, J2. A through transmission line connects SMA connectors J3 and J4. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. The board is constructed of a two metal layer FR4 material with a total thickness of 0.031". The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide model with trace width of 0.0476", trace gaps of 0.030", dielectric thickness of 0.028", metal thickness of 0.0021" and R of 4.3. Note that the predominate mode for these transmission lines is coplanar waveguide with a ground plane. J5 and J6 provide a means for controlling DC and digital inputs to the device. J6-1 is connected to the device VDD input. J5-1 is connected to the device CTRL input. J5-2 and J6-2 are GND connections. A decoupling capacitor (100 pF) is provided on both CTRL and VDD traces. It is the responsibility of the customer to determine proper supply decoupling for their design application. Removing these components from the evaluation board has not been shown to degrade RF performance.
Figure 11. Evaluation Board Layouts
Peregrine Specification 101/0102
Figure 12. Evaluation Board Schematic
Peregrine Specification 102/0134
Document No. 70-0090-05 www.psemi.com
(c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 8
PE4246
Product Specification
Figure 13. Package Drawing
6-lead DFN
3.00 C L
-A-B4
6 0.125
5
C L PIN MAR 1 K 0.10 C 1 4 0.10 C 2 3
3.00
4
0.125
10+2 -10 0.100 C
TOP VIEW
DETAIL C 0.025 0.025
0.90 0.10 0.080 C 3 0.0250.025 SIDE VIEW SEE DETAIL B
0.70 0.05 0.20 0.05 SEATING PLANE -CDETAIL B
C L 0.95 EXPOSED PAD 1 2 3
0.35
+0.08 -0.02 0.10 0.05 C
0.17 MIN. CAB 0.29 +0.21 -0.08 EXPOSED SLUG/ HEAT SINK 0.24 +0.20 -0.08 0.125 0.17 0.30
SEE DETAIL A R 0.15 TYP
R0.127 TYP 1.21 0.10 0.605 0.05 THIS FEATURE APPLIES TO BOTH ENDS OF THE PKG. DETAIL A EXPOSED METALIZED FEATURE EDGE OF PLASTIC BODY
EXPOSED (2X)
6
5
4
3 1.050.05 2.010.10
.20 MIN.
BOTTOM VIEW 1. DIMENSIONS AND TOLERANCES ARE PER ANSi Y14.5 2. DIMENSIONS ARE IN MILLIMETERS, ANGLES ARE IN DEGREES. 3 4 COPLANARITY APPLIES TO EXPOSED HEAT SLUG AS WELL AS THE TERMINALS. PROFILE TOLERANCE APPLIES TO PLASTIC BODY ONLY.
(c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 8
Document No. 70-0090-05 UltraCMOSTM RFIC Solutions
PE4246
Product Specification
Figure 14. Tape and Reel Specifications
6-lead DFN
Table 6. Dimensions
Dimension
Ao Bo Ko P W T R7 Quantity R13 Quantity
DFN 3x3mm
3.23 0.1 3.17 0.1 1.37 0.1 4 0.1 8 +0.3, -0.1 0.254 0.02 3000 N.A.
Note: R7 = 7 inch Lock Reel, R13 = 13 inch Lock Reel
Table 7. Ordering Information
Order Code
4246-01 4246-02 4246-00 4246-51 4246-52
Part Marking
4246 4246 PE4246-EK 4246 4246
Description
PE4246-06DFN 3x3mm-12800F PE4246-06DFN 3x3mm-3000C PE4246-06DFN 3x3mm-EK PE4246G-06DFN 3x3mm-12800F PE4246G-06DFN 3x3mm-3000C
Package
6-lead 3x3 mm DFN 6-lead 3x3 mm DFN Evaluation Kit Green 6-lead 3x3 mm DFN Green 6-lead 3x3 mm DFN
Shipping Method
12800 units / Canister 3000 units / T&R 1 / Box 12800 units / Canister 3000 units / T&R
(c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 8
Document No. 70-0090-05 UltraCMOSTM RFIC Solutions
PE4246
Product Specification
Sales Offices
The Americas Peregrine Semiconductor Corp.
9450 Carroll Park Drive San Diego, CA 92121 Tel 858-731-9400 Fax 858-731-9499
North Asia Pacific Peregrine Semiconductor K.K.
5A-5, 5F Imperial Tower 1-1-1 Uchisaiwaicho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213
Europe Peregrine Semiconductor Europe
Commercial Products: Batiment Maine 13-15 rue des Quatre Vents F- 92380 Garches, France Tel: +33-1-47-41-91-73 Fax : +33-1-47-41-91-73 Space and Defense Products: 180 Rue Jean de Guiramand 13852 Aix-En-Provence cedex 3, France Tel: +33(0) 4 4239 3361 Fax: +33(0) 4 4239 7227
South Asia Pacific Peregrine Semiconductor
28G, Times Square, No. 500 Zhangyang Road, Shanghai, 200122, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS is a trademark of Peregrine Semiconductor Corp.
Preliminary Specification
The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice).
Document No. 70-0090-05 www.psemi.com
(c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 8


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